Wide bandwidth, high-resolution, low power, DACs are key building-blocks in communication systems, and particularly in software-defined-radios (SDRs), adaptive radar, instrumentation, and multimedia.
Although new fabrication process nodes are introduced at rates corresponding to Moore's Law, allowing ever-increasing miniaturization and reduction in cost and power consumption of high data-rate systems, the long-recognized fundamental limitations associated with device mismatches and fabrication-process variations remain a limiting factor in implementing high-precision analog circuits. These circuits typically necessitate costly production testing, which may involve calibration and compensation often involving laser trimming. Additionally, production yields are typically limited due to process variations, which further impact the cost of high precision wideband data converters. Further, with limitations associated with the design and “productization,” wide bandwidth, high-resolution, low power DACs are not amenable to integration with extensively digital system-on-chip (SoC) solutions, which are typically realized in an advanced nanometer scale CMOS fabrication process and are becoming increasingly popular in high-volume consumer market products. This inhibits not only the miniaturization, which is of importance particularly in portable products, but also the ultimate cost reduction that is so desirable in all markets.